1. Field of the Invention
The present invention relates to an information processing apparatus, and particularly to a microprocessor that operates under the control of a microprogram.
2. Description of the Prior Art
FIG. 1 is a view schematically showing construction of a conventional microprocessor based on the microprogram controlling method. The microprocessor processes machine language instructions accompanying plural kinds of operands such as register operands, memory operands and immediate operands.
Operation of the microprocessor will be described with reference to this figure.
A machine language instruction 1a is input to an instruction decoder 1 from an external source and decoded in the instruction decoder 1 to provide an internal instruction. The internal instruction has an instruction format which is executable in the processor. The internal instruction is output to and stored in an internal instruction register 2.
Generally, there are three kinds of operands, i.e., register operand, memory operand and immediate operand.
If a source of an operand is a register, a source register field SR of the internal instruction register 2 holds the number of the register in a general register set 3. If a destination of an operand is a register, a destination register field DR of the internal instruction register 2 holds the number of the register in the general register set 3.
An immediate data field IMM of the internal instruction register 2 is a region for storing numeric data.
If an operand is a memory operand, a field MA of the internal instruction register 2 holds the operand address in an external memory 4.
A microprogram storing block 5 is a region for storing microprograms for executing internal instructions. Information as to the kind of instruction processing, among the decoding result of the instruction decoder 1 is sent, as a first address of a microprogram to be used, to the microprogram storing block 5. According to the address sent, to block 5 respective microinstructions which constitute the microprogram are read from the microprogram storing block in order to execute the internal instruction.
The microinstruction read from block 5 is stored in a microinstruction register 6. The microinstruction held in the microinstruction register 6 is input to a micro-decoder 7. The micro-decoder 7 decodes the microinstruction and, according to a result of the decoding, generates operand requests.
According to the operand requests, operands needed for executing the machine language instruction are obtained on a local bus 8.
Conventional information processing apparatuses such as the microprocessor explained above have problems to be described below.
If the kinds of the operands or the kinds of the combinations of operands are different from each other, different microprograms should be prepared for respective cases even if the same kind of process is carried out. This may increase the number of steps for a microprogram, and push up labor and time necessary for developing the microprograms. Further, the necessary size of the microprogram storing block 5 is increased. And the increased size of the microprogram storing block 5 increases access time and deteriorates a machine language instruction processing efficiency. In addition, power consumption will be increased.
That is, in the case where an operand is in a register in the general register set 3, a microprogram that carries out the following process is used: the number of the register that is held in the field SR or DR of the internal instruction register 2 is selected by a selector 9 comprising memory 9a register 9b and inverter 9c and sent to the general register set 3. According to the register number sent, the register is selected from among the registers in the general register set 3. Then, the contents of the selected register are output to the local bus 8, or data on the local bus 8 are stored in the selected register.
If the operand is a source memory operand in the external memory 4, a microprogram that carries out the following process is used: The address that is held in the field MA of the internal instruction register 2 is selected by the selector 9, and the external memory 4 is accessed according to the address to provide data to a memory data register (MDR) 10. The data thus stored in the MDR 10 is output to the local bus 8.
If the operand is an immediate operand, a microprogram is used to output data stored in the field IMM of the internal instruction register 2 to the local bus 8.
In carrying out, for example, the following same adding process, different microprograms should be prepared for respective combinations of operands.
That is, if two operands are both register operands, the following two-step microprogram should be prepared: EQU --, YS, ASL, YD, ADL ADD, .sub.--, .sub.--, ALU, YD, END (1)
if one operand is a register operand and the other operand is an immediate operand, the following two-step microprogram should be prepared: EQU --, IMM, ASL, YD, ADL ADD, .sub.--, .sub.--, ALU, YD, END (2)
and if one operand is a memory operand and the other operand is an immediate operand, the following three-step microprogram should be prepared: EQU --, IMM, ASL, MDR, ADL ADD, .sub.--, .sub.--, ALU, MDR .sub.--, .sub.--, .sub.--, .sub.--, .sub.--, MW, END (3)
The representation YS, ASL, e.g., in the first microinstruction of the microprogram (1) corresponds to a process of transferring the content of a register whose number is stored in the field SR of the internal instruction register 2 to an arithmetic source logic register ASL 11 via the local bus 8. The representation YD, ADL corresponds to a process of transferring the content of a register whose number is held in the field DR of the internal instruction register 2 to an arithmetic destination logic register ADL 12 via the local bus 8. The representation ALU, YD in the second microinstruction corresponds to a process of transferring a result of the addition from an ALU 13 to the register whose number is held in the field DR of the internal instruction register 2, via the local bus 8.